Current injected ramp with reduced recovery time background of the

Abstract

A ramp circuit discharges an output capacitor to generate a substantially linear ramp signal, current injection is used to stabilize the ramp's output, reducing overshooting and ringing. With faster output stabilization, the ramp exhibits significantly faster repetition rates suitable testing high speed components such as RAM, microprocessors, high speed logic, and the like. The ramp includes an output transistor, with its output defining an output node coupled to a current source and a charge storage device such as a capacitor. The charge storage device charges when the transistor is 'on'. Namely, when the transistor is turned on, the output charge storage device is coupled to a reference voltage, which charges the device in a fixed time. When the transistor is turned 'off', the charge storage device discharges, aided by the flow of current through the current source, resulting in the linear ramp signal. After the charge storage device discharges, current injection is used to quickly stabilize the ramp's output. Particularly, while the output transistor is turned on, permitting the charge storage device to recharge, a transistor couples a bias current source to the output node. Specifically, the transistor is configured to selectively couple the bias current source to the output node when the output transistor is turned on, or a predetermined time thereafter. Conversely, the transistor selectively decouples the bias current source from the output node when the ramp output arrives within a predetermined threshold value of the target ramp starting value.