Integrated circuit failure analysis using color voltage contrast

Abstract

A method and apparatus for analyzing failures in integrated circuits. A first image is obtained using an emission or electron microscope while an integrated circuit is operating under a first set of conditions. The image is integrated for improved resolution with a camera in front of the microscope screen or with a digitizer coupled to receive video signals from the microscope. The first image is digitized and stored in a first channel of an RGB digitizer board and displayed on a display screen. A second image is obtained in the same way and is digitized and stored in a second channel of the RGB digitizer board and displayed on the display screen. The remaining channel of the RGB digitizer board is coupled to receive live images. The resulting combined image appears as a black and white image so long as the images are aligned. Any differences between the three images will appear conspicuously in color. The input logic levels to the integrated circuit are changed. Nodes having changed logic levels will appear in color in the display because they will only affect the third channel. In addition, the displayed image will simultaneously show nodes which have not changed states in different shades of grey depending upon the unchanged logic level. The displayed image may then be compared to a previously obtained reference image from an integrated circuit known to not have any defects. Any differences between the two images will indicate the exact location of a failure or defect.