The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 19, 1999
Filed:
Apr. 13, 1998
Applicant:
Inventor:
Mikio Sakurai, Hyogo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365233 ; 36523003 ; 365195 ;
Abstract
A reset signal generation circuit included in an output control circuit ANDs a reset signal for resetting complementary data buses for transferring data to a second output stage at prescribed timing and an internal control signal corresponding to a read mask signal and outputs a reset signal for resetting other complementary data buses for transferring the data to a final output stage. Thus, invalid data is reset on the complementary data buses.
Sakurai, Mikio. (1999). Synchronous semiconductor memory device having function of inhibiting (U.S. Patent No. 5970021). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5970021
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