The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 19, 1999
Filed:
Feb. 03, 1997
Charles R Erickson, Fremont, CA (US);
Peter H Alfke, Los Altos Hills, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
An input interface circuit for a logic device having a configuration of pull-up and pull-down devices for defining the logic level based on an undriven input signal where the pull-up and pull-down devices are independently and separately programmable to follow the input signal (e.g., a keeper circuit), or follow the inverse of the input signal, or programmed permanently on, or programmed permanently off. The interface circuit can be used to provide a known and programmable output signal for an IC input (or internal line) that does not have a known driving source. By allowing this degree of flexibility, the input interface circuit of the present invention, under programmed control, generates an output signal with positive or negative feedback based on the input signal; or the input interface circuit provides a constant high or constant low signal output, or can oscillate or provide a high impedance response as output. In cases when the input pin (or internal line) is not being driven by a bus or source driver, the input interface provides a number of flexible configurations for supplying predetermined outputs. Within a programmable logic device, a separate input interface circuit is provided with each external pad (or internal line) that provides signals within the integrated circuit originating from associated input pins. The input interface contains two multiplexers which drive the pull-up and pull-down devices, each multiplexer being coupled to receive inputs from programmable memory cells and having a common control line.