The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 19, 1999
Filed:
Jun. 16, 1997
Kuo-Tung Chang, Austin, TX (US);
Ko-Min Chang, Austin, TX (US);
Wei-Ming Chen, Austin, TX (US);
Keith Forbes, Austin, TX (US);
Douglas R Roberts, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
An EEPROM device includes a split-gate FET (10) having a source (36), a drain (22), a select gate (16) adjacent the drain (22), and a control gate (32) adjacent the source (36). When programming the split-gate FET (10), electrons are accelerated in a portion of a channel region (38) between the select gate (16) and the control gate (32), and then injected into a nitride layer (24) of an ONO stack (25) underlying the control gate (32). The split-gate FET (10) is erased by injecting holes from the channel region (38) into the charge nitride layer (24). When reading data from the split-gate FET (10), a reading voltage is applied to the drain (22) adjacent the select gate (16). Data is then read from the split-gate FET (10) by sensing a current flowing in a bit line coupled to the drain (22).