The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 19, 1999
Filed:
Oct. 31, 1996
Roland T Knaack, Starkville, MS (US);
Cypress Semiconductor Corp., San Jose, CA (US);
Abstract
The present invention concerns a circuit and method to automatically test and disable defective rows in a FIFO or other buffer where the wordlines or rows of the FIFO buffer are driven by a shift register scheme. Additional enabled rows may be placed within the normal memory array. The additional enabled rows are substituted, as needed, for one or more defective rows. As a result, a defective row can be automatically disabled without effecting the operation of the FIFO, particularly the read or write data path. In one example, the disabling effect is achieved by using a comparison circuit to determine if the words read from the memory are accurate. The present invention can be used to effectively bypass any single shift register element or a multiple number of shift register elements.