The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 1999
Filed:
Oct. 30, 1997
Brian Anthony Moane, Ballykeeffe, IE;
Analog Devices, Inc., Norwood, MA (US);
Abstract
A high swing interface output stage integrated circuit for interfacing a data communications device with a data bus which may operate at voltage ranges outside the supply voltage of the interface circuit. An output terminal of the integrated circuit is coupled to a positive supply rail of the circuit through a substrate NPN transistor, and to a ground rail through first and second NMOS FETS. A third MOS FET also formed is coupled between the common connection of the first and second NMOS FETS and the gate of the second NMOS FET for holding the second NMOS FET off in the event of the voltage on the output terminal being driven below the ground voltage of the circuit. Other NMOS and PMOS FETS in the circuit control the operation of the circuit for determining the high and low states of the voltage on the output terminal. The interface circuit presents either a high impedance or a current limiting impedance to the output terminal in the event of the output terminal voltage being driven outside the supply voltage of the circuit.