The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 12, 1999

Filed:

Nov. 12, 1997
Applicant:
Inventors:

Edward Jay Frankoski, Newark Valley, NY (US);

Irving Memis, Vestal, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K / ; H01L / ;
U.S. Cl.
CPC ...
257779 ; 257786 ; 257772 ; 257667 ; 257673 ; 361717 ; 361718 ; 361719 ; 361720 ;
Abstract

The present invention provides printed circuit boards for mounting to a semiconductor integrated circuit die. In one embodiment the printed circuit boards comprise a rigid dielectric substrate having a planar face, a plurality of circuit lines affixed to the face of the substrate, and a plurality of conductive bumps affixed to the face of the substrate. Each conductive bump has an upper bonding surface that is substantially planar and a lateral surface which is essentially perpendicular to the face of the substrate. The conductive bumps and the circuit lines are formed from a single metallic layer. The conductive bumps and circuit lines constitute a unitary, integral structure, i.e., each conductive bump and connecting circuit line lack a physical interface therebetween. The upper surfaces of the conductive bumps extend to essentially the same height above the surface of the substrate, i.e., the upper surfaces of the conductive bumps are substantially coplanar relative to each other. In another embodiment, the printed circuit board further comprises a unitary solder dam or a plurality of unconnected solder dams that partially or completely surround the conductive bumps. The solder dam has an upper surface which lies below the upper bonding surface of the conductive bump. The solder dam is positioned to prevent the alloy, particularly solder, which is subsequently disposed on each conductive bump from flowing along the circuit lines that are integrally connected to the conductive bump. The present invention also relates to a microelectronic package that comprises a semiconductor integrated circuit die mounted to a printed circuit board made in accordance with the present invention.


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Frankoski, Edward. (1999). Printed circuit boards for mounting a semiconductor integrated circuit (U.S. Patent No. 5965944). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5965944

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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