The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 1999
Filed:
Aug. 14, 1996
Applicant:
Inventors:
David James Hathaway, Underhill Center, VT (US);
Roger Sherman Rutter, Johnson City, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
39550004 ; 39550007 ;
Abstract
A method of designing the clocking circuitry of an integrated circuit chip. The load sinks are assigned to clock nets, each clock net having less then a maximum load. The first step is selecting a pair of clock nets for improvement. Next, a subset of the load sinks of the pair of clock nets are assigned to each clock net. Thereafter, the unassigned load sinks are assigned in all possible combinations to each of the pair of clock nets. A penalty function for each load sink assignment, and the assignment having the best penalty function is kept.