The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 1999
Filed:
Jun. 11, 1998
Sung-geun Lee, Kyungki-do, KR;
Woo-seop Jeong, Suwon, KR;
Samsung Electronics, Coi., Ltd., Suwon, KR;
Abstract
A clock signal generating circuit for use in a synchronous dynamic random access memory device. The clock signal generating circuit includes an input buffer for converting an externally supplied system clock signal having a first voltage level into a clock signal having a voltage level necessary for operating with the internal circuitry of the memory device. An enable path circuit generates a second transition of an internal clock signal which occurs substantially simultaneous the second transition of the system clock signal. The enable path circuit generates the first transition of the internal clock signal after the internal clock signal is maintained at the second state for a predetermined interval responsive to first and second disable signals. Finally, a disable path circuit receives the clock signal generated from the input buffer and supplies the first and second disable signals to the enable path circuit.