The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 1999
Filed:
Feb. 05, 1998
Applicant:
Inventors:
Raymond M Leong, Los Altos, CA (US);
Derek Johnson, Los Gatos, CA (US);
Mathew R Arcoleo, San Jose, CA (US);
Assignee:
Cypress Semiconductor Corp., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523003 ; 365 49 ; 36518905 ;
Abstract
A memory array comprising a plurality of storage elements and a logic circuit. The memory array may be configured to (i) receive a plurality of input data streams, (ii) store each of the plurality of input data streams in one or more of the storage elements in response to a plurality of control signals and (iii) present a plurality of output data streams in response to the plurality of input data streams. The logic circuit may present the plurality of control signals in response to the fullness of each of the plurality of storage elements.