The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 1999

Filed:

Dec. 31, 1997
Applicant:
Inventors:

Tutomu Saito, Hamamatsu, JP;

Masayuki Suda, Hamamatsu, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523001 ; 365231 ;
Abstract

Disclosed is a method for controlling a memory address of a digital signal processor in which a memory address is independently managed for each for during parallel processing of a plurality of jobs and no program of the same content as others is stored redundantly. Two bits of a high order A19 and A18 are masked among memory addresses of 20 bits from A0 to A19 which can be accessed for internal and external memories by a digital signal processor. In an address setting and an address computation performed on a program for executing each of jobs of the digital signal processor, only an address space of 18 bits from A0 to A17 can be accessed by an address pointer. The masked two bits of A19 and A18 are accessed by an address area register.


Find Patent Forward Citations

Saito, Tutomu. (1999). Method for controlling memory address of digital signal processor (U.S. Patent No. 5963498). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5963498

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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