The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 1999

Filed:

May. 14, 1998
Applicant:
Inventor:

Donald R Sauer, San Jose, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F / ;
U.S. Cl.
CPC ...
330-9 ; 330300 ;
Abstract

An interface stage for interfacing between input and output stages of a rail to rail comparator. The interface stage combines and amplifies four input stage output currents from the input stage, including by common base feeding them to a symmetrical set of virtual grounds, to generate a differential output signal for driving the output stage. In preferred embodiments, the interface stage includes two sets of bipolar transistors, each set connected in a common base configuration, which amplify each input stage output current and assert the resulting amplified signals to a pair of symmetrical virtual ground circuits. Each virtual ground circuit comprises a bipolar transistor and is configured to combine two of the amplified signals to generate one component of the differential output signal. By employing the virtual ground circuits, the slew rate of the interface stage is principally determined by its input transconductance and the collector-to-base stray capacitance of the bipolar transistors of the virtual ground circuits. Thus, since the virtual ground circuits can be implemented with minimum geometry bipolar transistors having very low collector-to-base stray capacitance, the interface stage can be implemented to have very high slew rate. In other embodiments, the invention comprises a rail to rail comparator input stage (having an autozero switch) coupled with an interface stage including autozero circuitry. The autozero circuitry and the autozero switch can be controlled to execute an autozero operation in which DC noise due to offset in the output signal (of the combined input and interface stage) is rapidly attenuated by means of a negative feedback loop.


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