The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 1999
Filed:
Mar. 12, 1997
Applicant:
Inventors:
David A Harrison, Cupertino, CA (US);
Joshua M Silver, Sunnyvale, CA (US);
Soren T Soe, San Jose, CA (US);
Assignee:
Xilinx, Inc., San Jose, CA (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
326 39 ; 326 38 ; 326 37 ; 711170 ;
Abstract
A method for programming programmable logic devices (PLDs) having multiple function block types to implement a logic function, whereby the logic function is mapped into one of the function block types before being mapped into the remaining function block types. In one embodiment, a PLD containing both 'fast' function blocks (FFBs) and 'high density' function blocks (HDFBs) are programmed such that the FFBs are programmed prior to the HDFBs. This method maximizes the overall speed of an implemented logic function.