The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 1999

Filed:

Dec. 20, 1996
Applicant:
Inventors:

Chan-Jong Park, Seoul, KR;

Se-Jin Jeong, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G06F / ;
U.S. Cl.
CPC ...
714718 ; 714820 ; 714 42 ; 365201 ; 370244 ;
Abstract

There is disclosed a parallel test circuit for a semiconductor memory device having a memory army with a plurality of memory cells and a plurality of comparators used for high-speed memory cell test, including a plurality of fist comparators performing first comparison with respect to data transmitted through a plurality of data output lines formed near memory blocks of the memory array; a plurality of second comparators coupled in common with each output terminal of the first comparators and performing second comparison with respect to output data of the first comparators; a multiplexer multiplexing output of the second comparator; first and second switches alternatively connected to an output terminal of the multiplexer; and a data output buffer coupled in common with output terminals of the first and second switches and buffering outputs of the first and second switches. The multiplexer is connected to the first switches for a first mode operation, and is connected to the second switch for a second mode operation to thereby perform a two-way data test.


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