The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 28, 1999
Filed:
Apr. 14, 1997
Giuseppe Bianca, Temecula, CA (US);
Robert M Bogursky, Encintas, CA (US);
Autosplice Systems Inc., San Diego, CA (US);
Abstract
A continuous stamping of plated metal components, with carrier links between their ends, for surface mount soldering. A strip of components is formed which can be individually easily separated at severance regions between the adjacent components. The severance regions are located in the carrier links between the components. Preferably, the carrier links are offset upwardly from a solderable surface (20) of the components, or alternatively may be coplanar with such surface (FIG. 17). The carrier regions (21) that remain after severance may also serve as an overtravel stop during insertion of the component into a support. In a two-row embodiment (FIG. 10), the carrier regions (50, 52) are formed to be asymmetrical in order to increase spacing between pins. Advantages include: less material required, lower cost for selective plating, adjustable pin length in the die, flat stamping, tip plating for better electrical contact, and scrapless end product.