The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 1999

Filed:

Feb. 19, 1998
Applicant:
Inventors:

Makoto Kikuchi, Tokyo, JP;

Kiyotaka Mizuno, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03B / ;
U.S. Cl.
CPC ...
327107 ; 327100 ; 324617 ;
Abstract

A wave shaping circuit for a semiconductor device testing apparatus reduces discrepancies in timing of signals by shortening lengths of signal transmission paths. The scale of the circuit is restrained by reducing the number of connecting lines between a modulation waveform generator and buffer circuits. A set signal and a reset signal generated by the modulation waveform generator are input to a first wave shaping SR register which produces a single pattern waveform to be applied to devices under test. The single pattern waveform is multiplied n-fold by the buffer circuit. Signals from the buffer circuit are received by invert/noninvert circuits which provide invert signals and noninvert signals. Differential circuits receive the invert/noninvert signals to generate set signals and reset signals having minimal discrepancies in timing which are input to second wave shaping SR registers. The wave shaping SR registers thus produce n occurrences of pattern waveforms having the same pulse width for a plurality of devices under test.


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