The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 14, 1999
Filed:
Sep. 29, 1997
Kenneth S Szajda, Waltham, MA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A low-gain, low-jitter VCO circuit implemented in CMOS provides center frequency adjustment to overcome process variations. Further, noise immunity is improved by using a separate feedback loop to provide the nominal current biasing for the oscillator chain. This feedback loop coarsely sets the center frequency. The actual control of the oscillation frequency is achieved by a second current source, whose output is added to the nominal bias current to provide a total bias to the oscillator. This second current source 'fine tunes' the oscillator frequency responsive to a control signal. Because two separate current sources are used, the circuit can realize a high oscillation frequency with a low VCO gain. Another feature provides for adjusting the center frequency in response to a digital input word provided via external pins, or from internal logic or memory. The center frequency thus can be calibrated by measurement at the time of manufacture, or changes later by the end user or by other circuitry.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile