The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 14, 1999
Filed:
Jan. 27, 1997
Applicant:
Inventor:
Kunihiko Kato, Tokyo, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
714-6 ;
Abstract
To use both an array of main memory cells and an array of redundant memory cells efficiently during a block writing operation, a memory system for performing the block writing operation includes a bit line activator activating at least one bit line of bit lines of the array of main memory cells and at least one bit line of bit lines of the array of redundant memory cells simultaneously during the block writing operation.
Kato, Kunihiko. (1999). Single-chip memory system having a redundancy judging circuit (U.S. Patent No. 5951692). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5951692
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