Fast modeling of signal propagation delays through interconnect wires

Abstract

A method of analyzing a plurality of signal propagation delays along a plurality of signal interconnection lines within a programmable integrated circuit using a distributed electrical circuit model for the signal interconnection lines which programmably interconnect the electronic circuits forming the cooperative logic functions within the programmable integrated circuit. Load models representing such electronic circuits are incorporated into the circuit model for the signal interconnection lines, and differential nodal equations are generated in accordance with Kirchhoff's Current Law. The differential equations are converted to linear equations in which time is expressed in terms of a finite time interval, or time step. The linear equations are simplified by using substitution techniques for the common variables, thereby producing simplified linear nodal equations which can be collectively represented in a matrix format which includes a square quasi-diagonal coefficient matrix in which all elements more than one element away from the major diagonal thereof have a zero value. Such simplified linear nodal equations can be quickly and easily solved to compute the signal propagation delays along the signal interconnection lines, thereby facilitating any necessary redesign of such signal interconnection lines so as to reduce critical signal propagation delays.