The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 07, 1999
Filed:
Mar. 26, 1998
Masashi Otsuka, Fujisawa, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A chip size package is constituted by a chip on which an integrated circuit is formed, and plated bumps are formed at terminal portions of the integrated circuit, a flexible two-layered printed-circuit board having interlevel conductive bumps for electrically connecting metal patterns formed on the two surfaces of the flexible board, and an anisotropic conductive film for electrically connecting the plated bumps arranged on the chip to the flexible two-layered printed-circuit board, and fixing the chip onto the flexible two-layered printed-circuit board. With these features, the chip size package is excellent in mass production without any sealing by potting and any setting/removing on/from a convey jig and the like for every product.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile