The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 1999

Filed:

Mar. 27, 1998
Applicant:
Inventor:

Masanori Kajitani, Motosu-gun, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518519 ; 36518518 ; 36518528 ; 36518503 ;
Abstract

In order to increase the efficiency of a write operation with respect to a non-volatile semiconductor memory having a floating gate electrode, a memory cell transistor (40) is connected to a bit line (42), which is further connected to a current limitation circuit (30). The current limitation circuit (30) comprises a number of parallely connected switching transistors (31 to 34), and grounds the bit line (42). While a constant level for a write clock .phi.W supplied via a bit line 42, remains, the switching transistors (31 to 34) are stepwise turned to thereby stepwise increase a write current IPP, allowing analog information to be written into the memory cell transistor (40).


Find Patent Forward Citations

Kajitani, Masanori. (1999). Non-volatile semiconductor memory device and method for writing (U.S. Patent No. 5946236). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5946236

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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