The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 1999

Filed:

Jun. 10, 1997
Applicant:
Inventors:

Masanori Tsukamoto, Tokyo, JP;

Kazuhiro Tajima, Tokyo, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438486 ; 438264 ; 438265 ;
Abstract

A making method of a semiconductor device comprising the step of forming a first silicon layer on a silicon substrate, forming a second silicon layer comprising amorphous silicon on the first silicon layer, then crystallizing the second silicon layer and further forming a conductive layer made of a metal silicide or a metal on the second silicon layer, wherein the method comprises forming an intermediate layer to the surface of the first silicon layer after forming the first silicon layer and before forming the second silicon layer, in which the interlayer film has a film thickness within such a range as electrons are conducted by direct tunneling and such a film thickness as disconnecting the succession of the crystallinity of the first silicon layer upon crystallization of the second silicon layer. Accordingly, fluctuation of Vth caused by inter-diffusion of impurities by way of the metal silicide layer is reduced in CMOS of the dual layered polysilicon polycide structure is decreased.


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