The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 17, 1999

Filed:

May. 12, 1997
Applicant:
Inventors:

Kyu Jin Lee, Seoul, KR;

Sang Hyeog Lee, Suwon, KR;

In Ho Hyun, Yongin-gun, KR;

Il Ung Kim, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438 15 ; 438613 ; 29593 ; 257 48 ;
Abstract

A method for manufacturing a known good die array('KGD' array ), which includes the steps of: (a) forming a plurality of circuit patterns, and bonding pads to match solder bumps on a wafer; (b) providing solder bumps on the bonding pads; (c) forming metal layers for wire-bonding on the solder bumps; (d) dividing the wafer having metal layers into respective individual circuit pattern unit dies; (e) holding at least one die in a die holder for testing; (f) wire-bonding circuit contacts of the die holder with the metal layers using wires; (g) testing the die which is electrically interconnected with the die holder; and (h) removing simultaneously the metal layer on the solder bumps for wire bonding and the wires from the die to give a known good die array having solder bumps.


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