The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 1999

Filed:

Nov. 21, 1997
Applicant:
Inventors:

Aleksandr Frid, San Francisco, CA (US);

Anthony P Casano, Felton, CA (US);

Assignee:

Phoenix Technologies Ltd., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395737 ; 395670 ;
Abstract

A single controller handles keyboard functions and ACPI configuration and power management functions, while providing priority to keyboard functions so that there is no end user-perceptible compromise of keyboard functionality. When an interrupt is received by the microcontroller, it is determined whether the interrupt is an embedded controller interrupt received at the embedded controller host interface or a keyboard interrupt received at the keyboard host interface. If the interrupt is a keyboard interrupt, the keyboard function is handled in a standard fashion. If the interrupt is an embedded controller interrupt for an ACPI configuration or power management function, a burst timer is started and the command is handled by a command dispatcher. If the embedded controller is in burst mode, multiple commands may be received during a burst period. Commands which are not completed before the expiration of the burst timer are aborted, and a data return vector is set to the absolute address at the point of abortion in the firmware. Aborted commands are resumed on reception of the next embedded controller interrupt by continuation of the process at the data return vector address.


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