The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 1999

Filed:

Mar. 27, 1997
Applicant:
Inventor:

Donald N Allingham, Fort Collins, CO (US);

Assignee:

Adaptec, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
39550003 ; 39550034 ;
Abstract

A design verification system for simulating designs and evaluating the simulation results against a set of expected events. A set of expected events are generated and loaded into an expect buffer. As the simulation proceeds, each modelled device collects data on each event into an event record. Each event record is compared against the set of expected events. If the set of expected events contains an entry that matches the event record, the matching entry is removed from the expect buffer. If a matching entry is not found then the event record is flagged as an error. The system is flexible to design changes and efficient as the exact ordering of events is not critical to the simulation outcome.


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