High speed and low power signal line driver and semiconductor memory

Abstract

A signal line driver operating at high speed and consuming low power and a semiconductor memory device employing the same are disclosed. The signal line driver includes one or more first pull-up transistors, one or more second pull-up transistors, and one or more pull-down transistors. The first pull-up transistor is connected between an external power supply terminal and an output terminal and responds to a first control signal which swings between an internal power supply voltage and a ground voltage. The external power supply terminal receives an external power supply having a voltage level higher than the voltage level of the internal power supply. The first pull-up transistor provides an output signal to the output terminal having the voltage level of the internal power supply voltage minus a predetermined voltage drop. The second pull-up transistor is connected between the internal power supply voltage terminal and the output terminal. The internal power supply terminal receives the internal power supply. The second pull-up transistor increases the voltage level of the output signal to the voltage level of the internal power supply responsive to a second control signal. The pull-down transistor is connected between the output terminal and the ground voltage. The pull-down transistor provides a ground voltage to the output terminal responsive to a third control signal. The semiconductor memory device includes an input buffer, an output buffer, a data input/output line write driver, an input/output line write driver, a data input/output line read driver, and a memory cell array. At least one of the drivers for the semiconductor memory device includes the signal line driver described above.