Method for manufacturing bimos device with improvement of high frequency

Abstract

In a method for manufacturing a BiMOS device, first and second semiconductor layers are formed on a semiconductor substrate, first and second field insulating layers are formed by using a LOCOS process on said first and second semiconductor layers, respectively. The first field insulating layer partitions a bipolar transistor area and a MOS transistor area, and the second field insulating layer is formed on a base-emitter junction region of the first semiconductor layer. Then, impurities are introduced via the second field insulating layer into the first semiconductor layer to form a base region therein. Then, an emitter opening is perforated in the second field insulating layer, and a polycrystalline silicon layer is formed on the second field insulating layer. Then, impurities of a first conductivity type are introduced into the polycrystalline silicon layer, and a heating operation is performed upon the polycrystalline silicon layer to form an emitter region. Then, the polycrystalline silicon layer is patterned to form an emitter electrode. Then, a gate insulating layer is formed on the second semiconductor layer, and a gate electrode is formed on the gate insulating layer. Finally, a base graft region is formed type in the first semiconductor layer and source/drain regions are formed in the second semiconductor layer.