The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 27, 1999
Filed:
Jul. 16, 1997
Kaizad Rumy Mistry, Acton, MA (US);
Jeffrey William Sleight, Marlboro, MA (US);
Digital Equipment Corporation, Maynard, MA (US);
Abstract
A field effect transistor structure having: a first type conductivity semiconductor body disposed on an insulator and having formed in different regions thereof: (a) a source region; (b) a drain region, such source and drain regions being of a conductivity type opposite the conductivity type of the body; (c) a gate electrode adapted to control a flow of carriers in a channel through the semiconductor body between the source and drain regions; and (d) a Schottky contact region providing a Schottky diode between the semiconductor body and one of the source and drain regions. With such an arrangement, the Schottky diode, when forward biased provides a fixed voltage, about 0.3 V, between the semiconductor body and one of the source and drain regions. A method for forming a semiconductor structure, comprising the steps of: providing a semiconductor body over an electrical insulator; providing source and drain areas in the semiconductor body on either side of a gate channel; introducing dopant into un-masked portions of the source and drain areas to form source and drain regions in the semiconductor body, such mask blocking such dopant from passing into the masked portion of at least one of the source and drain areas and the contiguous portion of the semiconductor body; and forming a metal between the masked portion of the at least one of the source and drain regions and the contiguous portion of the semiconductor body. The metal forming step may be performed prior to, or subsequent to, the dopant introduction step.