The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 1999

Filed:

Mar. 01, 1996
Applicant:
Inventors:

Hiroyuki Furukawa, Ueno, JP;

Kunihiko Yamamoto, Kashiba, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G / ;
U.S. Cl.
CPC ...
345 98 ; 345103 ; 345 99 ;
Abstract

The memory interface circuit converts an input data signal into multi-scan data signals used for a multi-scan type liquid crystal display. The memory interface circuit includes: a memory for storing one frame of the input data signal corresponding to the display panel, and a control circuit for controlling write/read operations for the memory so that the input data signal is sequentially written in the memory in a single-scan manner, and that data stored in the memory is read out as first and second multi-scan signals in a multi-scan manner. The control circuit controls timing of read operations so that a read operation for the second multi-scan signal is started a predetermined time after that for the first multi-scan signal is started, the predetermined time being equal to a delay time of a write operation of the input data corresponding to the second portion with respect to that corresponding to the first portion.


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