The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 27, 1999
Filed:
Sep. 22, 1998
Kevin P D'Angelo, Santa Clara, CA (US);
Robert S Wrathall, Scotts Valley, CA (US);
Impala Linear Corporation, Sunnyvale, CA (US);
Abstract
A circuit and method for providing a voltage regulation despite variations in the supply voltage and/or the load utilize a MOS synchronous rectifier in a flyback topology to perform both step-up and step-down operations. The circuit operates in a boost-type operation until the voltage at an output terminal exceeds a predetermined shut-off voltage. At such time, a duty cycle of the circuit is suspended until the voltage at the output terminal falls below the predetermined shut-off voltage. Triggering the duty cycle and the suspension of the duty cycle are dependent solely upon the voltage at the output terminal. The circuit includes a steering device that connects the body of MOS synchronous rectifier to either its source or its drain to consistently configure the MOS synchronous rectifier in a reverse-biased condition. Preferably, the steering device is comprised of two PMOS transistors that are controlled by the voltages at the source and drain of MOS synchronous rectifier.