Floating gate type non-volatile semiconductor memory for storing

Abstract

A non-volatile semiconductor memory cell comprises a diffused layer or silicide layer formed in a surface of semiconductor substrate within an opening of an insulating layer formed on the semiconductor substrate, a first floating gate electrode formed on a first gate insulator film formed on the diffused or silicide layer within the opening of the insulating layer, and a semiconductor thin film formed to cover a second gate insulator film formed on the first floating gate electrode. The semiconductor thin film includes a channel region positioned above the first floating gate electrode and a pair of source/drain regions separated from each other by the channel region. The memory cell also includes a second floating gate electrode formed on a third gate insulator film formed on the semiconductor thin film, and a second control gate electrode formed on a fourth gate insulator film formed on the second floating gate electrode. Thus, a first floating gate transistor is formed of the channel region, the pair of source/drain regions, the first floating gate electrode and the first control electrode, and a second floating gate transistor is formed of the channel region, the pair of source/drain regions, the second floating gate electrode and the second control gate electrode, whereby one memory cell is constituted of the first and second floating gate transistors to be able to store multi-value information to elevate an integration density per bit.