The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 1999
Filed:
Dec. 24, 1997
Applicant:
Inventor:
Shigeru Mori, Hyogo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365233 ; 365193 ; 365195 ; 365227 ; 365229 ;
Abstract
An internal clock generating circuit 200 applies an external clock signal Ext.CLK to a clock buffer circuit 206 in response to activation of a chip select signal ext./CS. The clock buffer circuit 206 is synchronized with the external clock signal Ext.CLK to generate an internal clock signal int.CLK. In response to inactivation of an internal circuit activating signal .phi..sub.ACT for designating activating an operation of an internal circuit of an SDRAM, a clock input control circuit 204 stops transmitting the external clock signal Ext.CLK and an operation for generating the internal clock signal int.CLK is stopped.