The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 1999

Filed:

Mar. 13, 1997
Applicant:
Inventor:

Kiyoshi Ito, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324765 ; 3241581 ;
Abstract

A method of testing ICs in parallel is capable of receiving a state signal from handlers to estimate process start times of the handlers, and of changing a test start request interruption wait time. Automatic carriages automatically supply and accommodate IC issue test start request interruption signals to an external device control circuit of an IC tester. IC testing stations execute tests of ICs at the same time. When the test start request interruption signals are not issued from all the automatic carriages, a computer of the IC tester reads an operating state of the automatic carriages which do not issue the test start request interruption signal so as to judge whether the automatic carriage is in a significant wait condition. The IC testing stations immediately execute the test of ICs if the automatic carriages are not in the significant state. The computer calculates an optimal wait time if the automatic carriage is in the significant state, and the IC testing stations execute the test at the time when the optimal wait time lapses.


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