The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 1999
Filed:
Mar. 10, 1997
Christian Ponte, La Colle sur Loop, FR;
VLSI Technology, Inc., San Jose, CA (US);
Abstract
The present invention comprises and interrupt controller for use with a programmable digital processor system. The interrupt controller of the present invention includes a plurality of interrupt blocks. The interrupt blocks are used for coupling to a corresponding plurality of peripheral devices. Each of the interrupt blocks are coupled to a data bus included within the interrupt controller. The interrupt controller also includes an interrupt control register. The interrupt control register is coupled to each of the interrupt blocks, and upon receiving an internal interrupt request from any of the interrupt blocks, asserts a processor interrupt request responsive to the internal interrupt request. The interrupt controller includes a processor interrupt request line adapted to couple to a programmable digital processor. The interrupt control register is coupled to the processor interrupt request line and asserts the processor interrupt request to an interrupt input of the programmable digital processor via the processor interrupt request line. The interrupt controller further includes an interrupt acknowledge line adapted to couple to the programmable digital processor. The interrupt acknowledge line is coupled to the input blocks to convey an interrupt acknowledge signal from the programmable digital processor to the interrupt blocks. The interrupt acknowledge signal is conveyed to the interrupt blocks such that each of the peripheral devices efficiently share the interrupt request input of the programmable digital processor.