The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 1999

Filed:

Feb. 02, 1996
Applicant:
Inventor:

Hiroshi Mutoh, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03H / ;
U.S. Cl.
CPC ...
375233 ; 375232 ; 370291 ;
Abstract

A decoding circuit for a magnetic recording and reading system enables the implementation of an AGC loop with a relatively simple configuration and further enables easy clock extraction and high operating speed. The level setting system for setting the signal level to be taken as the value 1 in the decoding circuit is configured so as to comprise a variable-gain amplifier, a PR4 equalizer having characteristics capable of equalizing to a target PR4 equalization waveform, and a level detector which feeds the output signal back to the variable-gain amplifier as an AGC loop control signal to control the gain thereof. The detection system of the decoding circuit is configured so as to comprise a VFO which generates a system clock fs, and a decision feedback type decoding means in a decision section, which decodes data lines which appear at the output of the PR4 equalizer. In doing this, by configuring the decision feedback type decoding means so as to comprise a decoding means for even data lines and a decoding means for odd data lines, it is possible to reduce the system clock frequency to one half, thereby enabling an increase in the speed of decoding.


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