The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 1999
Filed:
Oct. 24, 1997
Sintiat Te, San Jose, CA (US);
Advanced Array Corp., San Jose, CA (US);
Abstract
A DRAM includes a data input buffer having a first input terminal coupled to data I/O pins, a second input terminal coupled to a column address buffer, a third input terminal coupled to a column address strobe buffer, and an output terminal coupled to a column decoder. When reading a selected cell of the DRAM, the first row address and the first column address are latched on the falling edge of the row address strobe signal from the address input pins into a row address buffer and from the I/O pins into the data input buffer, respectively, of the DRAM. While the row address is decoded and used to select a row of memory cells of the DRAM, the column address is decoded and used to select one of the cells from the selected row. Data corresponding to the selected cell is forwarded to the I/O pins on the first falling edge of the column address strobe signal. By latching both the first row address and the first column address on the falling edge of the row address strobe signal, the access time of the first column address is hidden.