The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 1999
Filed:
Oct. 08, 1996
Michael Miethig, Waterloo, CA;
Charles Russell Smith, Waterloo, CA;
Eric Charles Fox, Waterloo, CA;
Michael George Farrier, Boyne City, MI (US);
Dalsa, Inc., , CA;
Abstract
A fast frame interline transfer charge coupled device imaging sensor includes an imaging section and an storage section. The imaging section includes a plurality of interline transfer registers, each interline transfer register containing a plurality of interline register elements. The imaging section further includes an interline clocking structure, the interline clocking structure including polycrystalline silicon buss lines used as gate electrodes, the polycrystalline silicon buss lines being connected to a metal strapping network, the interline clocking structure causing charge to be transferred between interline register elements of each interline transfer register based on interline clocking signals. The storage section is coupled to the imaging section. The storage section includes a plurality of storage registers, each storage register containing a plurality of storage register elements. The storage section further includes a storage discharge structure and a storage clocking structure. Each storage register element of the storage registers is selectively coupleable through the storage discharge structure to a storage drain. The storage clocking structure has first and second clocking structure parts, the first clocking structure part corresponding to first storage register elements coupled to respective interline registers. The first clocking structure part is coupled to the interline clocking structure so as to cause charge to be transferred from the respective interline registers to the first storage register elements based on the interline clocking signals. The second clocking structure part causes charge to be transferred between storage register elements of each storage register based on frame clocking signals.