The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 1999
Filed:
Jul. 24, 1997
Michael P Corriveau, Underhill, VT (US);
Christopher Ro, Burlington, VT (US);
Stephen D Wyatt, Jericho, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An integrated circuit such as an application specific integrated circuit (ASIC) which has operational power supplies provided for different respective analog cores and digital logic and/or macros may be tested using on-chip power supplies, preferably comprising operational amplifiers connected as voltage followers and controlled by a band-gap voltage source or a voltage divider, drawing power from a single power supply to the chip which is generally provided in a standardized pin-out location. Disablement of respective operational amplifiers also provides electrical isolation of the respective cores during testing. A reduced pin-count is involved in the testing procedure since operational power supply connections can be open circuited or 'tri-stated'. On-chip power supplies for testing provides power while avoiding a need to provide low-noise power supplies and/or complex switching in a test system or to utilize custom front-end boards or both to provide power to arbitrary chip or package connections.