The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 1999
Filed:
Dec. 12, 1996
David E Jones, Quincy, IL (US);
Mark A Walker, Palmyra, MO (US);
Thomas L Frederick, Liberty, IL (US);
Kevin P Murphy, Palmyra, MO (US);
Gerald D Deters, Quincy, IL (US);
Glenayre Electronics, Inc., Charlotte, NC (US);
Abstract
A biasing circuit for a power amplifier, for use in a transmitter, that substantially reduces distortion during key-up and thereby reduces key-up time. The power amplifier includes an output transistor and a bias circuit. The bias circuit is applied to all the class AB stages of the power amplifier. The bias circuit provides to the output transistor a first bias level during the preheat period and a second bias level during the transmit period. This first bias level is predetermined to cause the output transistor to reach the steady-state junction temperature achieved by the output transistor during the transmit period (i.e., when transmitting output signals biased with the second bias level). The preheat period ends when this steady-state temperature is reached. Thus, the power amplifier can then transition to a transmit period having already reached the steady-state junction temperature. Because the output transistor is already heated to the steady-state junction temperature, 'thermal' distortion (i.e., the distortion incurred when the output transistor's junction temperature changes while transmitting) is avoided and the key-up time is reduced.