The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 1999
Filed:
Feb. 04, 1997
Applicant:
Inventor:
Gensuke Goto, Kawasaki, JP;
Assignee:
Fujitsu Limited, Kanagawa, JP;
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
36478404 ; 36478403 ;
Abstract
An adder circuit includes a 4-2 compression circuit in which a NAND signal of a first input signal and a second input signal and an exclusive-OR signal of the first and second signals are produced. When the exclusive-OR output is true, a third signal is output as an intermediate carry-out signal while when the exclusive-OR signal is false, a NOT signal of the NAND signal is output as the intermediate carry-out signal. Therefore, the circuit can be reduced in size by reducing the number of necessary elements without sacrificing its high speed capability.