The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 1999

Filed:

Aug. 29, 1997
Applicant:
Inventors:

Jayendar Rajagopalan, Santa Clara, CA (US);

Paolo Nora, Milan, IT;

Fred C Lee, Blacksburg, VA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M / ; H02M / ; G05F / ;
U.S. Cl.
CPC ...
363 89 ; 363 48 ; 363 80 ; 323288 ;
Abstract

A method for preparing power factor control integrated circuits which generate linear pulse width modulation (PWM) waveforms is presented. The method of pulse width modulation waveform generation involves providing a capacitor; fast charging the capacitor; and controlling a discharge rate of the capacitor to ensure a constant switching period and a linear PWM waveform. The method is applicable for any single-phase ac/dc converter topology that performs power factor correction. Unlike conventional techniques which utilize three feedback loops, the method of the present invention reduces the total number of feedback loops to two, eliminates input voltage sensing and achieves the same objective. This method results in significant integrated circuit simplification, such as elimination of multiplier, squarer and divider circuits in the control integrated circuit and reduces the cost of the integrated circuit.


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