The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 1999
Filed:
Sep. 03, 1997
Applicant:
Inventors:
Guoliang Shou, Tokyo, JP;
Kazunori Motohashi, Tokyo, JP;
Makoto Yamamoto, Tokyo, JP;
Sunao Takatori, Tokyo, JP;
Assignees:
Yozan, Inc., Tokyo, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H01L / ;
U.S. Cl.
CPC ...
326103 ; 326 34 ; 326 83 ;
Abstract
A MOS inverter within a large scale integrated circuit (LSI) includes a pair of circuits with the same performance. Each of the circuits includes a plurality of MOS inverters serially connected from the first stage to the last stage. Each of the MOS inverters is provided with an input such that the input of the MOS inverters of the first stage are formed to be adjacent one another.
Quick Actions:
Shou, Guoliang. (1999). Mos inverter circuit (U.S. Patent No. 5917343). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5917343
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile