The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 1999

Filed:

Sep. 13, 1996
Applicant:
Inventors:

Leonard George Cohen, Atlanta, GA (US);

Charles Howard Henry, Skillman, NJ (US);

Yuan P Li, Duluth, GA (US);

Morton I Schwartz, Alpharetta, GA (US);

Yan Wang, Chamblee, GA (US);

Henry Howard Yaffe, Reisterstown, MD (US);

Assignee:

Lucent Technologies Inc., Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
364491 ; 364490 ;
Abstract

A computer system and method provide a CAD tool by which a mask for an application specific optical integrated circuit, chip, or wafer may be generated both easily and quickly. The method involves the step of receiving the design for an optical circuit with the circuit design including at least one optical component. Each optical component in the optical circuit is defined by one or more geometric shapes, such as a trapezoid, rectangle, or an arcuate polygon. The method further includes the step of retrieving parameters which define the manufacturing standard by which the optical circuit will be fabricated as well as parameters which define the optical components in the optical circuit. Based on the parameters and the geometric shapes, a plot is generated which forms a mask layout for the optical circuit. The mask layout can then be viewed by a graphical editor whereby a designer can receive visual confirmation that the mask layout accurately portrays the desired optical circuit, chip, or wafer.


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