The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 1999

Filed:

Oct. 02, 1997
Applicant:
Inventor:

Bernd M Rundel, Tucson, AZ (US);

Assignee:

Burr-Brown Corporation, Tucson, AZ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341135 ; 341155 ;
Abstract

Power control circuitry is provided in an analog-to-digital converter (1) having a CDAC array (2) coupled to an analog input signal, a comparator (3), and a successive approximation register circuit (5). The power control circuitry includes a bias control circuit (4) responsive to a powerdown signal and associated wakeup signal to produce a bias control signal (V.sub.BIAS). The bias control circuit includes a controllable current mirror circuit (10) which produces a first voltage (V.sub.C) on a first conductor (13) when the powerdown signal is at a first level to allow operation of the comparator in conjunction with the CDAC array and the successive approximation register circuit. The bias control circuit also includes a wakeup circuit (20) which precharges the first conductor (13) to a predetermined bias voltage (V.sub.C ') that is close in value to the first voltage (V.sub.C) in response to occurrence of the first level of the powerdown signal. The bias control signal V.sub.BIAS is produced and equal to the first voltage V.sub.C.


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