The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 1999
Filed:
Dec. 17, 1996
Donald Lynn Plumton, Dallas, TX (US);
Jau-Yuann Yang, Richardson, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method and structure for a vertical FET transistor device (VFET) is described for a lower junction capacitance VFET to decrease the switching power loss and achieve increased current capacity and/or deceased thermal dissipation. In a preferred embodiment, the gate capacitance is reduced over prior art methods and structures by etching to the gate 14 and directly contacting the p+ gate with a p-ohmic contact 24. In another embodiment, the area under the gate contact 22 is implanted with a 'trim' dopant, where the trim dopant acts to reduce the doping of the drainlayer thereby reducing the capacitance. In another embodiment, the area under the exposed gate contact 22 is isolated by ion damaged to reduce the doping/conductivity of the n- drain layer below a portion of the gate layer to reduce the gate-to-drain capacitance.