The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 01, 1999

Filed:

Feb. 27, 1997
Applicant:
Inventors:

Yasushi Aoki, Tokyo, JP;

Mitsuo Baba, Tokyo, JP;

Atsushi Katayama, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03D / ;
U.S. Cl.
CPC ...
375373 ; 375355 ; 375354 ; 370503 ;
Abstract

In a bit synchronizing circuit, the oscillating operation is prevented in the phase synchronizing stage such that even the reception data including a phase variation such as a jitter component can be appropriately reproduced. A phase comparator compares the phase of reception data with that of each of the n-phase clock signals to produce clock phase information. An averaging circuit obtains mean value data of the clock phase information. D-type flip flop circuits achieve sampling operations of the reception data and latch therein n sampling data items to be thereafter outputted. A data selector selects one of the n sampling data items according to the mean value data of clock phase information and delivers therefrom the selected item as selection data. A clock selector selects one of the n-phase clock signals in association with the average data of clock phase information and then outputs the selected item as an extraction clock signal.


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