The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 25, 1999
Filed:
Apr. 25, 1997
Thomas P Dolbear, Austin, TX (US);
Advanced Micro Devices, Inc., , US;
Abstract
A low-profile heat transfer apparatus is presented for a surface-mounted semiconductor device employing a ball grid array (BGA) device package having a chip mounted upon a substantially flat upper surface of a substrate. The semiconductor device is mounted upon a component side of a printed circuit board (PCB), and the heat transfer apparatus is used to transfer heat energy from the semiconductor device to an ambient. A thermally conductive cap structure is positioned between the semiconductor device and the ambient. The cap structure includes a bottom surface having a first cavity sized to receive the substrate and possibly any decoupling capacitors. During use, the substrate resides within the first cavity. In a first embodiment, the chip resides within a second cavity in an upper wall of the first cavity during use. The chip and substrate are thermally coupled to the cap structure by a first and second thermal interface layer, respectively. The use of two thermal interface layers achieves a relatively low value of .theta..sub.JS, allowing the cap structure to remain relatively small. In a second embodiment, the chip resides within a hole in the cap structure during use such that the upper surface of the chip is exposed to the ambient. The substrate is thermally coupled to the cap structure by a thermal interface layer. The achieved value of .theta..sub.JS is acceptably low for some applications, and the height of the cap structure relative to the component side of the PCB is substantially reduced.