The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 1999

Filed:

Jul. 27, 1998
Applicant:
Inventors:

Fred Khosropour, San Jose, CA (US);

Ahmad Ghaemmaghami, Morgan Hill, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01J / ;
U.S. Cl.
CPC ...
438 15 ; 438109 ; 438125 ; 257692 ; 257693 ; 257694 ;
Abstract

Aspects for topside analysis of an integrated circuit die mounted in a flip-chip orientation are described. In an exemplary method aspect, the method includes isolating the multi-layer integrated circuit die from the flip-chip package, and exposing the multilayer integrated circuit die. The method further includes testing selected areas of the multi-layer integrated circuit die from a topside utilizing critical paths placed in a predetermined arrangement around edges of the multi-layer integrated circuit die.


Find Patent Forward Citations

Khosropour, Fred. (1999). Topside analysis of a multi-layer integrated circuit die mounted in a (U.S. Patent No. 5904489). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5904489

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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