The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 1999

Filed:

Feb. 10, 1997
Applicant:
Inventor:

Tsutomu Hayakawa, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F / ;
U.S. Cl.
CPC ...
430312 ; 430315 ; 430396 ; 438946 ;
Abstract

A method of fabricating a semiconductor device having a semiconductor substrate, a chip region and a scribe region, includes a step of forming a first hole in an insulating film on the chip region by using a step-and-repeat lithography system using a half-tone phase shift mask, and forming a conductive film on an entire surface of the semiconductor substrate. The conductive film is patterned such that the conductive film remains at least at a second hole and its peripheral portion, the second hole resulting in being formed at a four-fold exposure portion which is a portion where a plurality of shots have overlapped at the scribe region during the step of forming the first hole. Since the conductive film remains at the second hole and its peripheral portion, it is possible to prevent the formation of residue of the conductive film at sidewalls of the second hole when the conductive film is etched away from the scribe region.


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